Commits

History for

Commits on Jun 24, 2026

[JSC] Air::RegLiveness should follow to the method of WTF::Liveness
$Constellation$ Constellation
committed
b8a7279

Commits on Apr 3, 2026

Use "= default" for destructor in JavaScript Core
$neeraqa$ $Ahmad Saleem$
neeraqa
authored and
Ahmad Saleem
committed
e73b492

Commits on Jul 28, 2024

Rename WebAssembly JSC options to Wasm
$kmiller68$ kmiller68
committed
f8d5c15

Commits on Dec 9, 2022

Remove uses of Options::useWebAssemblySIMD.
$author$
Justin Michaud
committed
4ce45cf

Commits on Dec 8, 2022

[SIMD] SIMD functions should support Linear Scan and Graph Colouring register allocators.
$author$
Justin Michaud
committed
244d75c

Commits on Oct 24, 2022

Support v128 const load store and extract lane in bbq only with O0 register allocation
$justinmichaud$ $Justin Michaud$
justinmichaud
authored and
Justin Michaud
committed
baab8dd

Commits on Oct 19, 2022

Refactor RegisterSet to support 128-bit widths
$justinmichaud$ $Justin Michaud$
justinmichaud
authored and
Justin Michaud
committed
912bf24

Commits on Oct 15, 2022

Unreviewed, revert 255583@main because of build breakage
$Constellation$ Constellation
committed
6adb4a8
Refactor RegisterSet to support 128-bit widths
$justinmichaud$ $Justin Michaud$
justinmichaud
authored and
Justin Michaud
committed
a57d810

Commits on Oct 6, 2022

Revert clang-tidy change since it broke 32bit and watchOS
$Constellation$ Constellation
committed
aabfacb

Commits on Sep 18, 2022

Ran clang-tidy on JSC, WTF and bmalloc
$mikhailramalho$ mikhailramalho
committed
700ac83

Commits on Apr 14, 2017

Air::RegLiveness should be constraint-based
$author$
Filip Pizlo
committed
b65a737

Commits on Mar 26, 2017

Air should use RegisterSet for RegLiveness
$author$
Filip Pizlo
committed
5567925

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